The present invention is related to a signal processing circuit and method thereof, and more particularly, to a signal processing circuit for limiting a phase variation of an input signal to a specific range and a method thereof.
FIG. 1 is a diagram illustrating a conventional polar transmitter 10. The conventional polar transmitter 10 comprises a polar signal generating circuit 11, a modulating circuit 12, a phase-locked loop circuit 13, and a multiplier 14. The polar signal generating circuit 11 generates an amplitude component SA and a phase component SP according to a baseband input signal SI. The modulating circuit 12 performs a differentiation upon the phase component SP to generate a corresponding frequency component SF. The phase-locked loop circuit 13 locks the frequency component SF according to a carrier signal of the phase-locked loop circuit 13, and generates an up-converted signal SUP to the multiplier 14. The multiplier 14 multiplies the up-converted signal SUP with the amplitude component SA to generate a transmitted signal ST. Conventionally, to improve the adjacent channel leakage rejection of the polar transmitter 10, a higher oversampling ratio (OSR) is preferred. However, the higher oversampling ratio causes a higher frequency to be output from the modulating circuit 12 since the modulating circuit 12 performs the differentiation upon the phase component SP. Furthermore, when a drastic phase variation occurs in the phase component SP of the baseband input signal SI, e.g., 180° of phase variation occurs in the phase component SP, a peak frequency will also be generated at the output of the modulation circuit 12. It should be noted that the higher frequency is outputted from the modulating circuit 12, and a more complicated phase-locked loop circuit 13 is required to lock the frequency component SF. Therefore, how to reduce the frequency outputted from the modulating circuit 12 is a significant concern in the field of polar transmitters.